1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device such as an LSI (large-scale integrated circuit).
2. Description of the Prior Art
Many semiconductor integrated circuit devices are provided with, not only a single power supply system, but a plurality of power supply systems. This is, for example, to supply different types of electric power between digital circuits and analog circuits, or to use different power supply systems between I/O circuits and internal logic circuits. Where there are a plurality of power supply systems, each system exhibits a different level of resistance to static electricity. It is known that, in an LSI or similar device, formation of a component is accompanied with formation of a parasitic diode or bipolar transistor, and that such parasitic elements operate beneficially against electrostatic destruction.
How fully parasitic diodes are formed varies from one power supply system to another. For example, among the power supply systems shown in FIGS. 9A to 9C, the one shown in FIG. 9A has the largest parasitic-diode portion 101A added to its protection circuit 100, the one shown in FIG. 9C has almost no parasitic-diode portion, and the one shown in FIG. 9B has a parasitic-diode portion 101B half the size of that shown in FIG. 9A.
Against static electricity, the power supply system shown in FIG. 9A exhibits sufficient resistance, but the power supply system shown in FIG. 9C does not. In an LSI, destruction of only one power supply system, most probably the least resistant one, makes the entire LSI useless. Accordingly, it is desirable to strengthen the resistance of poorly resistant power supply systems by adding diodes in the I/O circuit and in the logic circuit, but this cannot be achieved without increasing the chip area.